dr_proc.h File Reference

Utility routines for identifying features of the processor. More...

Data Structures
struct	features_t
Defines
#define	PAGE_SIZE (4*1024)
#define	FAMILY_ITANIUM_2_DC 17
#define	FAMILY_ITANIUM_2 16
#define	FAMILY_K8L 16
#define	FAMILY_K8 15
#define	FAMILY_PENTIUM_4 15
#define	FAMILY_ITANIUM 7
#define	FAMILY_CORE_2 6
#define	FAMILY_CORE 6
#define	FAMILY_PENTIUM_M 6
#define	FAMILY_PENTIUM_3 6
#define	FAMILY_PENTIUM_2 6
#define	FAMILY_PENTIUM_PRO 6
#define	FAMILY_ATHLON 6
#define	FAMILY_PENTIUM 5
#define	FAMILY_K6 5
#define	FAMILY_K5 5
#define	FAMILY_486 4
#define	MODEL_PENTIUM_M_1MB 9
#define	MODEL_PENTIUM_M 13
#define	MODEL_CORE 14
#define	MODEL_CORE_2 15
Enumerations
enum	{ VENDOR_INTEL, VENDOR_AMD, VENDOR_UNKNOWN }
enum	feature_bit_t { FEATURE_FPU = 0, FEATURE_VME = 1, FEATURE_DE = 2, FEATURE_PSE = 3, FEATURE_TSC = 4, FEATURE_MSR = 5, FEATURE_PAE = 6, FEATURE_MCE = 7, FEATURE_CX8 = 8, FEATURE_APIC = 9, FEATURE_SEP = 11, FEATURE_MTRR = 12, FEATURE_PGE = 13, FEATURE_MCA = 14, FEATURE_CMOV = 15, FEATURE_PAT = 16, FEATURE_PSE_36 = 17, FEATURE_PSN = 18, FEATURE_CLFSH = 19, FEATURE_DS = 21, FEATURE_ACPI = 22, FEATURE_MMX = 23, FEATURE_FXSR = 24, FEATURE_SSE = 25, FEATURE_SSE2 = 26, FEATURE_SS = 27, FEATURE_HTT = 28, FEATURE_TM = 29, FEATURE_IA64 = 30, FEATURE_PBE = 31, FEATURE_SSE3 = 0 + 32, FEATURE_MONITOR = 3 + 32, FEATURE_DS_CPL = 4 + 32, FEATURE_VMX = 5 + 32, FEATURE_EST = 7 + 32, FEATURE_TM2 = 8 + 32, FEATURE_SSSE3 = 9 + 32, FEATURE_CID = 10 + 32, FEATURE_CX16 = 13 + 32, FEATURE_xPTR = 14 + 32, FEATURE_SYSCALL = 11 + 64, FEATURE_XD_Bit = 20 + 64, FEATURE_EM64T = 29 + 64, FEATURE_LAHF = 0 + 96 }
enum	cache_size_t { CACHE_SIZE_8_KB, CACHE_SIZE_16_KB, CACHE_SIZE_32_KB, CACHE_SIZE_64_KB, CACHE_SIZE_128_KB, CACHE_SIZE_256_KB, CACHE_SIZE_512_KB, CACHE_SIZE_1_MB, CACHE_SIZE_2_MB, CACHE_SIZE_UNKNOWN }
Functions
size_t	proc_get_cache_line_size (void)
bool	proc_is_cache_aligned (void *addr)
ptr_uint_t	proc_bump_to_end_of_cache_line (ptr_uint_t sz)
void *	proc_get_containing_page (void *addr)
uint	proc_get_vendor (void)
uint	proc_get_family (void)
uint	proc_get_type (void)
uint	proc_get_model (void)
uint	proc_get_stepping (void)
bool	proc_has_feature (feature_bit_t feature)
features_t *	proc_get_all_feature_bits (void)
char *	proc_get_brand_string (void)
cache_size_t	proc_get_L1_icache_size (void)
cache_size_t	proc_get_L1_dcache_size (void)
cache_size_t	proc_get_L2_cache_size (void)
const char *	proc_get_cache_size_str (cache_size_t size)
size_t	proc_fpstate_save_size (void)
size_t	proc_save_fpstate (byte *buf)
void	proc_restore_fpstate (byte *buf)
void	dr_insert_save_fpstate (void drcontext, instrlist_t ilist, instr_t *where, opnd_t buf)
void	dr_insert_restore_fpstate (void drcontext, instrlist_t ilist, instr_t *where, opnd_t buf)

Detailed Description

Utility routines for identifying features of the processor.

Define Documentation

#define FAMILY_486 4

proc_get_family() processor family: 486

#define FAMILY_ATHLON 6

proc_get_family() processor family: Athlon

#define FAMILY_CORE 6

proc_get_family() processor family: Core

#define FAMILY_CORE_2 6

proc_get_family() processor family: Core 2

#define FAMILY_ITANIUM 7

proc_get_family() processor family: Itanium

#define FAMILY_ITANIUM_2 16

proc_get_family() processor family: Itanium 2

#define FAMILY_ITANIUM_2_DC 17

proc_get_family() processor family: Itanium 2 DC

#define FAMILY_K5 5

proc_get_family() processor family: K5

#define FAMILY_K6 5

proc_get_family() processor family: K6

#define FAMILY_K8 15

proc_get_family() processor family: AMD K8

#define FAMILY_K8L 16

proc_get_family() processor family: AMD K8L

#define FAMILY_PENTIUM 5

proc_get_family() processor family: Pentium

#define FAMILY_PENTIUM_2 6

proc_get_family() processor family: Pentium 2

#define FAMILY_PENTIUM_3 6

proc_get_family() processor family: Pentium 3

#define FAMILY_PENTIUM_4 15

proc_get_family() processor family: Pentium 4

#define FAMILY_PENTIUM_M 6

proc_get_family() processor family: Pentium M

#define FAMILY_PENTIUM_PRO 6

proc_get_family() processor family: Pentium Pro

#define MODEL_CORE 14

proc_get_model() processor model: Core

#define MODEL_CORE_2 15

proc_get_model() processor model: Core 2

#define MODEL_PENTIUM_M 13

proc_get_model() processor model: Pentium M 2MB L2

#define MODEL_PENTIUM_M_1MB 9

proc_get_model() processor model: Pentium M 1MB L2

#define PAGE_SIZE (4*1024)

Size of a page of memory. Convenience macro to align to the start of a page of memory.

Enumeration Type Documentation

anonymous enum

Constants returned by proc_get_vendor().

Enumerator:

VENDOR_INTEL	proc_get_vendor() processor identification: Intel
VENDOR_AMD	proc_get_vendor() processor identification: AMD
VENDOR_UNKNOWN	proc_get_vendor() processor identification: unknown

enum cache_size_t

L1 and L2 cache sizes, used by proc_get_L1_icache_size(), proc_get_L1_dcache_size(), proc_get_L2_cache_size(), and proc_get_cache_size_str().

Enumerator:

CACHE_SIZE_8_KB	L1 or L2 cache size of 8 KB.
CACHE_SIZE_16_KB	L1 or L2 cache size of 16 KB.
CACHE_SIZE_32_KB	L1 or L2 cache size of 32 KB.
CACHE_SIZE_64_KB	L1 or L2 cache size of 64 KB.
CACHE_SIZE_128_KB	L1 or L2 cache size of 128 KB.
CACHE_SIZE_256_KB	L1 or L2 cache size of 256 KB.
CACHE_SIZE_512_KB	L1 or L2 cache size of 512 KB.
CACHE_SIZE_1_MB	L1 or L2 cache size of 1 MB.
CACHE_SIZE_2_MB	L1 or L2 cache size of 2 MB.
CACHE_SIZE_UNKNOWN	Unknown L1 or L2 cache size.

enum feature_bit_t

Feature bits returned by cpuid. Pass one of these values to proc_has_feature() to determine whether the underlying processor has the feature.

Enumerator:

FEATURE_FPU	Floating-point unit on chip
FEATURE_VME	Virtual Mode Extension
FEATURE_DE	Debugging Extension
FEATURE_PSE	Page Size Extension
FEATURE_TSC	Time-Stamp Counter
FEATURE_MSR	Model Specific Registers
FEATURE_PAE	Physical Address Extension
FEATURE_MCE	Machine Check Exception
FEATURE_CX8	CMPXCHG8 Instruction Supported
FEATURE_APIC	On-chip APIC Hardware Supported
FEATURE_SEP	Fast System Call
FEATURE_MTRR	Memory Type Range Registers
FEATURE_PGE	Page Global Enable
FEATURE_MCA	Machine Check Architecture
FEATURE_CMOV	Conditional Move Instruction
FEATURE_PAT	Page Attribute Table
FEATURE_PSE_36	36-bit Page Size Extension
FEATURE_PSN	Processor serial # present & enabled
FEATURE_CLFSH	CLFLUSH Instruction supported
FEATURE_DS	Debug Store
FEATURE_ACPI	Thermal monitor & SCC supported
FEATURE_MMX	MMX technology supported
FEATURE_FXSR	Fast FP save and restore
FEATURE_SSE	SSE Extensions supported
FEATURE_SSE2	SSE2 Extensions supported
FEATURE_SS	Self-snoop
FEATURE_HTT	Hyper-threading Technology
FEATURE_TM	Thermal Monitor supported
FEATURE_IA64	IA64 Capabilities
FEATURE_PBE	Pending Break Enable
FEATURE_SSE3	SSE3 Extensions supported
FEATURE_MONITOR	MONITOR/MWAIT instructions supported
FEATURE_DS_CPL	CPL Qualified Debug Store
FEATURE_VMX	Virtual Machine Extensions
FEATURE_EST	Enhanced Speedstep Technology
FEATURE_TM2	Thermal Monitor 2
FEATURE_SSSE3	SSSE3 Extensions supported
FEATURE_CID	Context ID
FEATURE_CX16	CMPXCHG16B instruction supported
FEATURE_xPTR	Send Task Priority Messages
FEATURE_SYSCALL	SYSCALL/SYSRET instructions supported
FEATURE_XD_Bit	Execution Disable bit
FEATURE_EM64T	Extended Memory 64 Technology
FEATURE_LAHF	LAHF/SAHF available in 64-bit mode

Function Documentation

void dr_insert_restore_fpstate	(	void *	drcontext,
		instrlist_t *	ilist,
		instr_t *	where,
		opnd_t	buf
	)

Inserts into ilist prior to where meta-instruction(s) to restore the floating point state from the 16-byte-aligned buffer referred to by buf, which must be 512 bytes for processors with the FXSR feature, and 108 bytes for those without (where this routine does not support 16-bit operand sizing). buf should have size of OPSZ_512; this routine will automatically adjust it to OPSZ_108 if necessary.

Note:: proc_fpstate_save_size() can be used to determine the particular size needed.

void dr_insert_save_fpstate	(	void *	drcontext,
		instrlist_t *	ilist,
		instr_t *	where,
		opnd_t	buf
	)

Inserts into ilist prior to where meta-instruction(s) to save the floating point state into the 16-byte-aligned buffer referred to by buf, which must be 512 bytes for processors with the FXSR feature, and 108 bytes for those without (where this routine does not support 16-bit operand sizing). buf should have size of OPSZ_512; this routine will automatically adjust it to OPSZ_108 if necessary.

Note:: proc_fpstate_save_size() can be used to determine the particular size needed.

ptr_uint_t proc_bump_to_end_of_cache_line ( ptr_uint_t sz )

Returns n >= sz such that n is a multiple of the cache line size.

size_t proc_fpstate_save_size ( void )

Returns the size in bytes needed for a buffer for saving the floating point state.

features_t* proc_get_all_feature_bits ( void )

Returns all 4 32-bit feature values. Use proc_has_feature to test for specific features.

char* proc_get_brand_string ( void )

Returns the processor brand string as given by the cpuid instruction.

size_t proc_get_cache_line_size ( void )

Returns the cache line size in bytes of the processor.

const char* proc_get_cache_size_str ( cache_size_t size )

Converts a cache_size_t type to a string.

void* proc_get_containing_page ( void * addr )

Returns n <= addr such that n is a multiple of the page size.

uint proc_get_family ( void )

Returns the processor family as given by the cpuid instruction, adjusted by the extended family as described in the Intel documentation. The FAMILY_ constants identify important family values.

cache_size_t proc_get_L1_dcache_size ( void )

Returns the size of the L1 data cache.

cache_size_t proc_get_L1_icache_size ( void )

Returns the size of the L1 instruction cache.

cache_size_t proc_get_L2_cache_size ( void )

Returns the size of the L2 cache.

uint proc_get_model ( void )

Returns the processor model as given by the cpuid instruction, adjusted by the extended model as described in the Intel documentation. The MODEL_ constants identify important model values.

uint proc_get_stepping ( void )

Returns the processor stepping ID.

uint proc_get_type ( void )

Returns the processor type as given by the cpuid instruction.

uint proc_get_vendor ( void )

Returns one of the VENDOR_ constants.

bool proc_has_feature ( feature_bit_t feature )

Tests if processor has selected feature.

bool proc_is_cache_aligned ( void * addr )

Returns true only if addr is cache-line-aligned.

void proc_restore_fpstate ( byte * buf )

Restores the floating point state from the 16-byte-aligned buffer buf, which must be 512 bytes for processors with the FXSR feature, and 108 bytes for those without (where this routine does not support 16-bit operand sizing).

Note:: proc_fpstate_save_size() can be used to determine the particular size needed.

size_t proc_save_fpstate ( byte * buf )

Saves the floating point state into the 16-byte-aligned buffer buf, which must be 512 bytes for processors with the FXSR feature, and 108 bytes for those without (where this routine does not support 16-bit operand sizing).

Note:: proc_fpstate_save_size() can be used to determine the particular size needed.

DR does NOT save the application's floating-point, MMX, or SSE state on context switches! Thus if a client performs any floating-point operations in its main routines called by DR, the client must save and restore the floating-point/MMX/SSE state. If the client needs to do so inside the code cache the client should implement that itself. Returns number of bytes written.

dr_proc.h File Reference

Data Structures

Defines

Enumerations

Functions

Detailed Description

Define Documentation

Enumeration Type Documentation

Function Documentation